Hardware Guide
RA6M5 for People Counting with TensorFlow Lite Micro
Renesas's RA6M5 is a solid choice for people counting using TFLite Micro. The cortex-m33 core at 200 MHz with 512 KB SRAM accommodates 200 KB models with room for application logic. DSP extensions available.
Published 2026-04-02
Hardware Specs
| Spec | RA6M5 |
|---|---|
| Processor | ARM Cortex-M33 @ 200 MHz |
| SRAM | 512 KB |
| Flash | 2 MB |
| Key Features | TrustZone hardware security, Renesas Secure Crypto Engine (SCE9), High-speed Cortex-M33 (200 MHz), QSPI for external memory expansion |
| Connectivity | Ethernet, USB HS |
| Price Range | $6 - $12 (chip), $25 - $50 (dev board) |
Compatibility:
The RA6M5's 512 KB SRAM delivers 2.7x the 192 KB minimum needed for people counting. The 200 KB quantized model fits in the tensor arena with enough remaining capacity for input buffers and core application logic. More demanding features (multi-sensor fusion, large protocol stacks) may require careful allocation planning. The RA6M5 provides 2 MB of flash memory, which accommodates the TFLite Micro runtime and 200 KB model. Space remains for firmware and basic OTA capability. The RA6M5 at 200 MHz combines Cortex-M33 with TrustZone, a crypto engine, and 512 KB SRAM. Renesas Reality AI adds vibration and time-series anomaly detection as a turnkey solution. The RA6M5 targets industrial and IoT ML applications with built-in security. People Counting requires camera input. The RA6M5 lacks native peripheral support for some of these sensors, requiring external interface circuitry. A camera interface (DVP/DCMI) is not available — SPI-based camera modules may work but with reduced frame rates. Evaluate whether the peripheral gap justifies an alternative MCU with native support. TFLite Micro's static memory allocation model maps well to the RA6M5's memory architecture — define a fixed tensor arena at compile time with no runtime heap fragmentation risk. The framework's operator coverage supports convolutional, depthwise-separable, and pooling layers needed for people counting. Model conversion uses the standard TFLite converter with int8 post-training quantization. At $6-12 per chip ($25-50 for dev boards), the RA6M5 is a reasonable investment for people counting deployments. Key RA6M5 features for this workload: TrustZone hardware security, Renesas Secure Crypto Engine (SCE9), High-speed Cortex-M33 (200 MHz), QSPI for external memory expansion.
Getting Started
- 1
Set up RA6M5 development environment
Install e2 studio with Renesas FSP (Flexible Software Package). Create a project targeting the RA6M5 and verify basic functionality (blink LED, serial output). For TFLite Micro, clone the framework repository and add it as a library dependency. Ensure the toolchain supports C++11 or later for the ML runtime.
- 2
Collect camera training data
Connect a camera module (e.g., OV2640 via DVP/SPI) to the RA6M5. Write a data logging sketch that captures camera readings at the target sample rate and outputs via serial/SD card. Collect 1000+ labeled samples across all classes. Capture images at the model input resolution (96×96 or lower).
- 3
Train and quantize model for TFLite Micro
Build a quantized MobileNet-SSD or YOLO-Tiny in TensorFlow or PyTorch. Apply int8 post-training quantization — this typically reduces model size by 4x with minimal accuracy loss. Convert to .tflite and generate a C array (xxd -i model.tflite > model_data.h). Target model size: under 200 KB to fit the RA6M5's 512 KB SRAM with room for application code.
- 4
Deploy and validate on RA6M5
Include the TFLite Micro runtime and compiled model in your Renesas project. Allocate a tensor arena of 300-500 KB in a static buffer. Run inference on live camera data and compare predictions against your test set. Log results to serial for desktop validation. Measure inference latency and peak RAM usage to verify they meet application requirements.
Alternatives
STM32H7 with TFLite Micro
STMicroelectronics cortex-m7 at 480 MHz with 1024 KB SRAM. $8-20 per chip. Compared to RA6M5: more RAM, faster clock. Excellent rated.
ESP32-S3 with TFLite Micro
Espressif xtensa-lx7 at 240 MHz with 512 KB SRAM. $3-8 per chip. Compared to RA6M5: cheaper. Excellent rated.
i.MX RT1062 with TFLite Micro
NXP cortex-m7 at 600 MHz with 1024 KB SRAM. $6-12 per chip. Compared to RA6M5: more RAM, faster clock. Excellent rated.
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FAQ
- What camera resolution works for people counting on RA6M5?
- On-device people counting models typically use 96×96 or 128×128 pixel grayscale input. The RA6M5's 512 KB SRAM constrains this: a 96×96 grayscale frame is ~9 KB, while 128×128 RGB would need ~49 KB. Without a native camera interface, use an SPI camera module (e.g., ArduCAM Mini) with reduced frame rates. Always downsample in firmware before inference.
- How do I update the people counting model on RA6M5 in production?
- Without wireless connectivity, model updates require physical access via USB/JTAG. For field deployments, consider adding a wireless module or using an MCU with built-in connectivity. Always validate model integrity with a checksum before switching to the new version.
- What size people counting model fits on RA6M5?
- The RA6M5 has 512 KB SRAM and 2 MB flash. A typical people counting model is 200 KB after int8 quantization. The tensor arena needs 300-400 KB at runtime. After model allocation, approximately 112 KB remains for application logic, sensor drivers, and Ethernet stack.
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