Hardware Guide

i.MX RT1062 for Object Detection with TensorFlow Lite Micro

For object detection, the i.MX RT1062 with TFLite Micro scores Excellent. Its 1024 KB internal SRAM (4.0x the required 256 KB) and 600 MHz clock ensure smooth real-time inference on 250 KB models. Hardware DSP extensions boost throughput.

Hardware Specs

Spec i.MX RT1062
Processor ARM Cortex-M7 @ 600 MHz
SRAM 1024 KB
Flash Up to 8 MB (external)
Key Features Crossover MCU (600 MHz Cortex-M7), 1 MB on-chip SRAM (double of RT1052), L1 cache (32 KB I + 32 KB D), FlexRAM (configurable ITCM/DTCM/OCRAM), No on-chip flash (external QSPI/HyperFlash)
Connectivity Ethernet, USB OTG HS/FS
Price Range $6 - $12 (chip), $25 - $40 (dev board)

Compatibility: Excellent

The i.MX RT1062's 1024 KB SRAM provides 4.0x the 256 KB minimum for object detection. This generous headroom means the 250 KB model tensor arena, sensor input buffers, and application logic (camera polling, Ethernet stack, state management) all fit without contention. The remaining 399 KB after model allocation supports complex application features. Flash storage at 8 MB comfortably houses the TFLite Micro runtime, the 250 KB model binary, application firmware, and OTA update partitions for field upgrades. Flash usage is well within budget for this configuration. The i.MX RT1062 runs at 600 MHz on a Cortex-M7 core, placing it among the higher-performance MCU options for ML inference. Its 1 MB SRAM and external memory interface support larger models including small vision networks. NXP's eIQ ML software provides optimized kernels for the RT series. Object Detection requires camera input. The i.MX RT1062 lacks native peripheral support for some of these sensors, requiring external interface circuitry. A camera interface (DVP/DCMI) is not available — SPI-based camera modules may work but with reduced frame rates. Evaluate whether the peripheral gap justifies an alternative MCU with native support. TFLite Micro's static memory allocation model maps well to the i.MX RT1062's memory architecture — define a fixed tensor arena at compile time with no runtime heap fragmentation risk. The framework's operator coverage supports convolutional, depthwise-separable, and pooling layers needed for object detection. Model conversion uses the standard TFLite converter with int8 post-training quantization. At $6-12 per chip ($25-40 for dev boards), the i.MX RT1062 offers strong value for object detection deployments. Key i.MX RT1062 features for this workload: Crossover MCU (600 MHz Cortex-M7), 1 MB on-chip SRAM (double of RT1052), L1 cache (32 KB I + 32 KB D), FlexRAM (configurable ITCM/DTCM/OCRAM), No on-chip flash (external QSPI/HyperFlash).

Getting Started

  1. 1

    Set up i.MX RT1062 development environment

    Install MCUXpresso IDE with the MCUXpresso SDK. Create a project targeting the i.MX RT1062 and verify basic functionality (blink LED, serial output). For TFLite Micro, clone the framework repository and add it as a library dependency. Ensure the toolchain supports C++11 or later for the ML runtime.

  2. 2

    Collect camera training data

    Connect a camera module (e.g., OV2640 via DVP/SPI) to the i.MX RT1062. Write a data logging sketch that captures camera readings at the target sample rate and outputs via serial/SD card. Collect 1000+ labeled samples across all classes. Capture images at the model input resolution (96×96 or lower).

  3. 3

    Train and quantize model for TFLite Micro

    Build a quantized MobileNet-SSD or YOLO-Tiny in TensorFlow or PyTorch. Apply int8 post-training quantization — this typically reduces model size by 4x with minimal accuracy loss. Convert to .tflite and generate a C array (xxd -i model.tflite > model_data.h). Target model size: under 250 KB to fit the i.MX RT1062's 1024 KB SRAM with room for application code.

  4. 4

    Deploy and validate on i.MX RT1062

    Include the TFLite Micro runtime and compiled model in your NXP project. Allocate a tensor arena of 375-625 KB in a static buffer. Run inference on live camera data and compare predictions against your test set. Log results to serial for desktop validation. Measure inference latency and peak RAM usage to verify they meet application requirements.

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FAQ

Can i.MX RT1062 run object detection inference in real time?
The i.MX RT1062 runs at 600 MHz with DSP acceleration. Whether this enables real-time object detection depends on your specific model architecture and acceptable latency. A 250 KB int8 model is a reasonable target for this hardware class. Larger models may require duty-cycled inference or model optimization (pruning, distillation). Benchmark your specific model on hardware to validate timing.
What is the power consumption for object detection on i.MX RT1062?
Power consumption during inference depends on clock configuration, active peripherals, and duty cycle. Consult the i.MX RT1062 datasheet for detailed power profiles at 600 MHz. For battery-powered object detection, use duty cycling: run inference at intervals and enter low-power sleep mode between cycles. Profile your specific workload to estimate battery life accurately.
What camera resolution works for object detection on i.MX RT1062?
On-device object detection models typically use 96×96 or 128×128 pixel grayscale input. The i.MX RT1062's 1024 KB SRAM constrains this: a 96×96 grayscale frame is ~9 KB, while 128×128 RGB would need ~49 KB. Without a native camera interface, use an SPI camera module (e.g., ArduCAM Mini) with reduced frame rates. Always downsample in firmware before inference.

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